If you're talking about 16-bit connection to the chip, that's arranged by kernel and bootloader. Scripts and stuff are totally ignorant of the physical connection to the NAND chip.
(Sounds more like a hardware issue - to use x16 NAND you'll need 8 extra wires routed to it. Many chips can run in both modes though.)
Anyway, you have full access to everything. No secrets, if it isn't in the repositories, we don't have it.
Actually I was talking to an Engineer at spansion. The problem is the kernel is incorrectly identifying the blocksize.
This is the line I see in the serial output
NAND Config: Reg=35142200, chipSize=128 MB, blockSize=512K, erase_shift=13
This is 100% wrong, because the chip I have is 100% x8 and not x16. The chip S34ML01G100TFI000 which is x8 , the x16 part is S34ML01G104TFI000 according to the datasheet page 71
I changed the file oe-alliance/builds/openvix/release/vuuno/tmp/work-shared/vuuno/kernel-source/drivers/mtd/brcmnand/brcmnand_base.c and hard coded values for x8 (128K pages) BUT compiling the image "MACHINE=vuuno DISTRO=openvix make image" did not affect the compiled kernel. Infact I put some debug messages in the .c file so that the above line SHOULD have printk as
DEBUGNAND Config: Reg=35142200, chipSize=128 MB, blockSize=512K, erase_shift=13
But nothing changed, so that tells me my changes are ignored and the file is either not used OR ignored?.
I'm not a C coder (Java) but I can hack the file so that its forced to use 128K pages by modifying function
brcmnand_decode_config(struct brcmnand_chip* chip, uint32_t nand_config)
And changing lines that look like this
switch ((nand_config & BCHP_NAND_CONFIG_BLOCK_SIZE_MASK)
>> BCHP_NAND_CONFIG_BLOCK_SIZE_SHIFT) {
case BCHP_NAND_CONFIG_BLOCK_SIZE_BK_SIZE_512KB:
chip->blockSize = 512 << 10;
break;
case BCHP_NAND_CONFIG_BLOCK_SIZE_BK_SIZE_8KB:
chip->blockSize = 8 << 10;
break;
case BCHP_NAND_CONFIG_BLOCK_SIZE_BK_SIZE_128KB:
chip->blockSize = 128 << 10;
break;
case BCHP_NAND_CONFIG_BLOCK_SIZE_BK_SIZE_16KB:
chip->blockSize = 16 << 10;
break;
}
To look like this (hard coding 128K values where 512K is set). I dont care for 512K as I will never use it so its a dirty hack but i dont know how else to fix this
switch ((nand_config & BCHP_NAND_CONFIG_BLOCK_SIZE_MASK)
>> BCHP_NAND_CONFIG_BLOCK_SIZE_SHIFT) {
case BCHP_NAND_CONFIG_BLOCK_SIZE_BK_SIZE_512KB:
chip->blockSize = 128 << 10;
break;
case BCHP_NAND_CONFIG_BLOCK_SIZE_BK_SIZE_8KB:
chip->blockSize = 8 << 10;
break;
case BCHP_NAND_CONFIG_BLOCK_SIZE_BK_SIZE_128KB:
chip->blockSize = 128 << 10;
break;
case BCHP_NAND_CONFIG_BLOCK_SIZE_BK_SIZE_16KB:
chip->blockSize = 16 << 10;
break;
}
Is that the right file to edit?, I'm unsure as if I change it and compile, my changes are not present, like its not using that file.